The present invention relates to a voltage detecting circuit. More particularly, the present invention relates to a circuit for detecting the buildup of the power source voltage and which is used when an internal circuit is automatically reset at the time the power source is switched on.
When electronic equipment is operated, functional blocks constituting the electronic equipment are first reset to the initial state and then operated normally. Accordingly, each functional block is provided with a signal input terminal for resetting an internal circuit within a certain time after the power source voltage reaches a predetermined level, and, furthermore, a circuit for detecting the build up of the power source voltage is arranged in each functional block to output reset pulses before the power source voltage reaches the predetermined level. An integrated circuit consisting of a capacitor and a resistor is often utilized as a power source voltage buildup detecting circuit of this type.
Recently, with the development of the integrated circuit, this type of power source voltage build up detecting circuit has been built into the integrated circuit, and thus the integrated circuit per se is automatically reset. The technique is generally adopted in microprocessors which are used in various fields, and various modes are considered for the power source voltage buildup detecting circuit. Ordinarily, however, there is adopted a type of mode in which the output of a series circuit consisting of a capacitor, a resistor, and a metal-oxide semiconductor (MOS) transistor is amplified by using an inverter stage.
However, in the above-mentioned circuit, the threshold voltage of the transistor is practically 0.8 V, and therefore the output voltage of the circuit is only 1.6 V at the highest. As a result, the level of the circuit is low, and operation of the functional blocks can not be guaranteed. This is a problem in the conventional technique.